1. Field of the Invention
The technology disclosed relates to high density memory devices based on phase change memory materials, and on other programmable resistance materials, and methods for manufacturing such devices.
2. Description of Related Art
In a phase change memory, each memory cell includes a phase change memory element. The phase change memory element is made of phase change materials that exhibit a large resistivity contrast between crystalline (low resistivity) and amorphous (high resistivity) phases.
In operation of a phase change memory element, an electrical current pulse passed through the phase change memory cell can set or reset the resistivity phase of the phase change memory element. To reset the memory element into the amorphous phase, an electrical current pulse with a large magnitude for a short time period can be used to heat up an active region of the memory element to a melting temperature, and then cool quickly causing it to solidify in the amorphous phase. To set the memory element into the crystalline phase, an electrical current pulse with a medium magnitude, which causes it to heat up to a crystallization transition temperature, and a longer cooling time period can be used allowing the active region to solidify in a crystalline phase. To read the state of the memory element, a small voltage is applied to the selected cell and the resulting electrical current is sensed.
As the set and reset operations depend on the temperature of the phase change material, the current or power in operations of phase change memory cells can be reduced by improving the thermal isolation of the memory cells. With improved thermal isolation, more of the power delivered to the memory element can be used to change the temperature of the active region, as opposed to the surrounding structure. Another benefit of thermally confined cells is better cycling endurance due to smaller volume of phase change memory materials. Thus, some design activity has focused on the thermal design of the memory cell. For example, one prior art reference proposes to form a small trench, and use atomic layer deposition (ALD) to fill in the small trench, resulting in a fill-in type memory cell that confines the phase change material, See Kim et al. “High Performance PRAM Cell Scalable to sub-20 nm technology with below 4F2 Cell Size, Extendable to DRAM Application,” 2010 Symp. on VLSI Tech. Digest of Papers, June 2010, pages 203-204. The fill-in process for this type of memory cell presents a manufacturing issue because of the narrow width within which the material must be deposited. Furthermore, with advances in semiconductor fabrication, device feature size decreases every year. When the feature size decreases, becomes difficult to fill phase change memory materials into the type of small trenches with narrow widths. As a result of this limitation, the process proposed by Kim will not scale well with shrinking process nodes.
It is desirable to provide a scalable memory cell structure with thermal isolation benefits.